Semiconductor device fabrication, such as transistor gate fabrication, typically involves several processing steps of depositing, etching, and removing layers to form the desired stack of gate layers. During each processing step, materials may be, for instance, deposited on, or etched from, a wafer. Because gate and, therefore, transistor performance may be impaired if damage to one layer occurs when another is being etched or removed, it may be desirable to seek to enhance gate performance by modifying the process by which layers are deposited and removed during fabrication.